Japanese Patent Laid-open 2003-203872 (patent document 1) discloses a vertical-type low-pressure CVD device which uses a mechanical booster pump and a dry pump, and maintains a wafer reaction atmosphere in highly clean state by introducing a raw material gas from an upper portion of a reaction chamber and by exhausting the raw material gas from a lower portion of the reaction chamber thus obtaining high-quality Si, SiGe or SiGeC.
Further, Japanese Patent Laid-open 2002-237590 (patent document 2) discloses a MOS-type field effect transistor in which a channel region has the stacked structure formed of a Si layer and a SiGe layer or a SiGeC layer sequentially from a surface, a source layer and a drain layer which are formed of SiGe or SiGeC containing high-concentration impurity atoms which impart a desired conductive type are brought into contact with both end surfaces of the channel region, and surfaces of the source layer and the drain layer which are formed of SiGe or SiGeC have a shape which is raised upwardly from a position of a bottom portion of a gate electrode.    Patent document 1: Japanese Patent Laid-open 2003-203872    Patent document 2: Japanese Patent Laid-open 2002-237590